Methods for bonding semiconductor wafers mechanically have been reported as follows.
The first method has been described on page 495 of "a digest report for a lecture meeting of the 47th applied physical society, 1986", and comprises steps of forming thermal oxide films each having a thickness of 2000 .ANG. on the surfaces of two Si wafers each being 20.times.20.times.0.4 mm.sup.3, forming spin-on glass layers each having a thickness of approximately 500 .ANG. on the thermal oxide films of the Si wafers, heating the two Si wafers at the temperature of 300.degree. C. by applying a pressure of 10 kg/cm.sup.2 to the bonding surfaces of the spin-on glass layers, and cutting one of the Si wafers off in the reverse epitaxy or the etch back process to provide a silicon on insulator (SOI).
The second method has been described on pages 593 to 595 of the Institute of Electronics Informations and Communications Engineers, Vol. No. 6", and comprises steps of polishing the surfaces of two Si wafers to be mirror planes, cleaning the mirror planes to be activated, and making the activated mirror planes of the two Si wafers in contact with each other in a clean atmosphere to provide a direct bonding of the two Si wafers.
The third method has been described on pages 3118 to 3120 of "J. Appl. Phys. 61(8), 15 April 1987", and comprises steps of depositing a metal thin film on one of two Si wafers to serve as a transport medium for Si atoms from one wafer to another, and heating the two wafers and applying a pressure of a predetermined value thereto, whereby the bonding of Si to Si is realized by solid-phase epitaxy.
In the first to third methods, the two Si wafers having no device formed thereon are bonded mechanically.
However, the first to third methods have a disadvantage in that these methods are difficult to be applied to a method in which semiconductor substrates having circuit elements such as transistors formed thereon are bonded, since adhesive which consists mainly of an insulation material is not utilized for the purpose of bonding the semiconductor substrates electrically, and since the characteristic deterioration and the damage of the circuit elements tends to occur in the step of heating the semiconductor substrates at a high temperature and applying a pressure of a predetermined high value thereto. Further, those methods have a disadvantage in that the curvature, and the expansion and contraction of the semiconductor substrate affect the alignment precision of circuit element patterns, where the semiconductor substrates are bonded in terms of a wafer scale.